Title: Efficient Inter-Process Communication Mechanisms for Data-Centric Computing
Date: December 16, 2025
Time: 9:30 AM – 11:30 AM (EST)
Location: KACB 3100 or https://gatech.zoom.us/j/2198386303
Committee:
Dr. Ada Gavrilovska (Advisor), Georgia Institute of Technology
Dr. Alexandros Daglis, Georgia Institute of Technology
Dr. Hyesoon Kim, Georgia Institute of Technology
Dr. Nam Sung Kim, University of Illinois, Urbana-Champaign
Dr. Francisco Romero, Georgia Institute of Technology
Abstract:
Modern data-intensive applications, ranging from large-scale analytics pipelines to multimodal AI inference systems, are increasingly constrained by the overhead of transferring and managing large volumes of intermediate data across complex memory hierarchies. While emerging hardware innovations, such as programmable memory engines, offer potential solutions, existing Inter-Process Communication (IPC) mechanisms remain rigid and CPU-centric, failing to adapt to dynamic workload behaviors or leverage these architectural advances effectively. This thesis explores how IPC services can be redesigned to overcome these limitations, proposing a new class of adaptive IPC mechanisms that integrate architecture-level advances with system-level flexibility.
First, the thesis introduces Pocket, a resource-aware IPC system designed to enable efficient split-architecture deployments. Addressing the ``boundary tax'' inherent in decoupled components, Pocket integrates lightweight resource management directly into the messaging interface. By allowing messages to carry resource expectations, Pocket enables just-in-time resource amplification and receiver-side adaptation. This design eliminates the performance penalties typically associated with isolation, effectively bridging the gap between monolithic efficiency and microservice flexibility.
Second, the thesis presents Rocket, a multi-backend IPC runtime that intelligently offloads memory copy operations to hardware accelerators (e.g., Intel DSA) or optimized kernel services. Unlike naive offloading approaches, which can degrade performance due to cache interference or synchronization overheads, Rocket employs a backend-aware strategy. It provides a suite of execution modes and hybrid polling mechanisms to determine when offloading is beneficial based on data volume, locality, and system noise, thereby maximizing computation-communication overlap in high-throughput pipelines.
Finally, the thesis proposes SkyRocket, a runtime-adaptive framework that optimizes IPC for heterogeneous data flows. Unlike static or naive configurations that apply a uniform strategy regardless of payload characteristics, SkyRocket leverages lightweight workload signatures to drive real-time adaptation. By dynamically switching between execution modes and backend strategies, it achieves adaptive control, ensuring that the IPC mechanism evolves in lockstep with the varying demands of multimodal applications. SkyRocket effectively narrows the performance gap between general-purpose IPC stacks and finely tuned, task-specific solutions.
Together, Pocket, Rocket, and SkyRocket demonstrate a practical and scalable path toward performance-aware IPC systems. By aligning IPC logic with modern hardware capabilities and application-level variability, this dissertation presents a comprehensive design space for efficient data movement in the era of hardware-accelerated, data-centric computing.