Title: Dynamic Analysis of Data Inconsistencies and Data Races in OpenMP Programs
Date: Monday, Nov 6, 2023
Time: 2:00 pm - 4:00 pm ET
Location: Klaus 3402 and Virtual (https://gatech.zoom.us/j/3092779704?pwd=SDVZaTlkTFpsZDRoYUU3Y0pzdmNvdz09)
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Lechen Yu
Ph.D. Student
School of Computer Science
Georgia Institute of Technology
Committee:
Dr. Vivek Sarkar (Advisor) – School of Computer Science, Georgia Institute of Technology
Dr. Santosh Pande – School of Computer Science, Georgia Institute of Technology
Dr. Qirun Zhang – School of Computer Science, Georgia Institute of Technology
Dr. Hyesoon Kim – School of Computer Science, Georgia Institute of Technology
Abstract:
OpenMP is a popular intra-node parallel programming model that supports several
problem decomposition approaches, including task parallelism, data parallelism, and heterogeneous
parallelism. When OpenMP introduces new parallel paradigms or features, it must
ensure that these additions align with the existing constructs to maintain consistency and
avoid unspecified behaviors. New features can result in revisions to the behavior of existing
constructs, which may in turn require programmers to re-evaluate their understanding of
existing constructs and adapt their code accordingly. Consequently, writing correct OpenMP
programs can be challenging even for experienced programmers.
To alleviate the intricacy of writing correct OpenMP programs, this proposal outlines
several dynamic analysis techniques that help programmers identify programming errors in
OpenMP programs. First, we describe various studies on device offloading, a recent OpenMP
feature still in its developmental phase. Our studies reveal discrepancies between the LLVM
implementation and the intended runtime behavior of device offloading. Additionally,
erroneous usage of device offloading constructs can lead to an assortment of memory
anomalies. Since these memory anomalies can generate disparities between host variables
and their corresponding counterparts on accelerator devices, we classify such bugs as data
inconsistencies. By establishing permissible memory accesses on the host and accelerator,
this proposal introduces a dynamic approach to detect data inconsistencies automatically.
The dynamic approach leverages a per-variable state transition model, which can be used to
establish the validity of the memory location before executing any memory accesses. Beyond
data inconsistencies, this proposal also delves into novel dynamic approaches for identifying
data races in OpenMP programs. By extending the SPD3 race detection algorithm, originally
designed for async-finish task parallelism, our dynamic race detection approach can handle a
large subset of parallel constructs in OpenMP, thereby checking more precise happens-before
relations among tasks relative to existing per-thread vector-clock-based approaches.