Ph.D. Proposal Oral Exam - Minxiang Gong

Title:  Computationally-Enhanced Non-Isolated High Voltage Point-of-Load DC-DC Converters for High Performance Computing

Committee: 

Dr. Raychowdhury, Advisor    

Dr. Mukhopadhyay, Chair

Dr. Shaolan Li

Abstract: The objective of the proposed research is to develop energy efficient non-isolated high voltage step-down point-of-load (POL) DC-DC converters. This proposal is discussed in-depth with anThe objective of the proposed research is to explore and design non-isolated high voltage point-of-load DC-DC converters with high efficiency, compact size, high reliability, and tight regulation for high performance computing in data centers. High voltage power bus (up to 60V) is replacing conventional low voltage bus (12V) for lower loss on bus and smaller system volume. However, high voltage converters face challenges of efficiency, reliability, regulation, and flexibility. My research focuses on circuit development of high voltage converters including converter topologies, reliable gate drivers, fast transient controls, and computational methods for converter optimization. In my current research, I propose, first, a design space exploration which provides a comprehensive investigation on high voltage converter designs including topologies, power devices (GaN/Si), and inductors. Second, a GaN-based programmable reconfigurable series-parallel hybrid converter with 83.7% peak efficiency at 48V/1V and improved dynamic range of operation in 180nm HV process. For future research, I propose a three-level hybrid Dickson topology with GaN/Si hybrid conversion and run-time optimizer targeting over 90% efficiency and high current density. overview of state-of-the-art and previous works on: (1) design space exploration and (2) programmable/reconfigurable hybrid converter. The design space exploration significantly reduces converter design complexity. The hybrid converter integrates digital controllers to improve converter's efficiency, dynamic range, and transient response. Further, I propose a hybrid converter with an on-chip runtime optimizer and GaN/Si hybrid conversion as one of my future works to demonstrate a high efficiency and high power density POL converter.

Event Details

Date/Time:

  • Thursday, February 3, 2022
    4:30 pm - 6:30 pm
Location: https://teams.microsoft.com/l/meetup-join/19%3ameeting_NDkyZDE5OTctNWQ1Yy00Y2EwLTgxYWQtN2I3NGY3MTZmNzQ1%40thread.v2/0?context=%7b%22Tid%22%3a%22482198bb-ae7b-4b25-8b7a-6d7f32faa083%22%2c%22Oid%22%3a%22a0063276-e987-4be0-8725-b88deb44835b%22%7d

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